Prior Art FIG. 1 illustrates an exemplary portion of a graphics pipeline 100, in accordance with the prior art. As shown, a rasterizer 102 is provided. In general, the rasterizer 102 identifies pixels which belong to a primitive being considered. One particular function of the rasterizer 102 shown in FIG. 1 is the generation of depth values. Associated therewith is at least one color value processor 104 coupled to the rasterizer 102. In use, the color value processor 104 is capable of generating color values.
Coupled to the rasterizer 102 is a first-in-first-out (FIFO) buffer 106 for buffering the depth values. Also included is a circuit 108 coupled to the color value processor 104 and further coupled to the FIFO buffer 106. As shown, the circuit 108 includes a pre-raster operation processor including a plurality of modules.
A first set of such pre-raster operation processor modules 110 is capable of processing only depth values. In particular, such modules 110 may be capable of performing depth testing, culling, etc. in preparation for additional similar processing utilizing the raster operation processor 116. A second set of such pre-raster operation processor modules 111 is capable of processing only color values. Just by way of example, the modules 111 may perform address translation, dithering, coverage operations, alpha operations, blending operations, etc. in preparation for additional similar processing utilizing the raster operation processor 116. In the context of the present description, a raster operation may include any fragment operations [e.g. operations that can update the frame buffer, based on upcoming and previously stored data, such as depth data, etc. (See OpenGL® Specification)].
Thus, a predetermined fixed bandwidth is allocated for processing the depth values via the rasterizer 102, FIFO buffer 106, and the associated pre-raster operation processor modules 110. Similarly, a predetermined fixed bandwidth is allocated for processing the color values via the color value processor 104 and the associated pre-raster operation processor modules 111.
Unfortunately, such fixed bandwidth framework does not utilize the processing capabilities of the graphics pipeline 100 in the most effective manner. For example, the color value processing may be disabled or not required for a particular pixel(s) during which the color value processor 104 and the associated pre-raster operation processor modules 111 remain idle. At the same time, the processing of the depth values may be lagging due to the limited resources of the rasterizer 102, FIFO buffer 106, and the associated pre-raster operation processor modules 110.
There is thus a need for a technique of processing depth values in a graphics pipeline in the most effective manner.